The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device applied to a semiconductor device including a flash memory having a split-gate MONOS structure.
As a nonvolatile semiconductor memory, flash memories are widely used. A type of such flash memories is a flash memory using a split-gate MONOS (Metal-Oxide-Nitride-Oxide-Silicon) structure. In each of memory cell transistors in this type of flash memory, a memory gate electrode for operating the memory cell and a control gate electrode for selecting the memory cell are separately provided. The memory gate electrode is formed in a sidewall shape over a side wall of the control gate electrode with an insulating film for holding charges being interposed therebetween.
Next, a description will be given of an example of an operation of the flash memory having the split-gate MONOS structure. A write operation is performed by a so-called SSI (Source Side Injection) method. That is, the write operation is performed by injecting hot electrons generated through the acceleration of electrons flowing from a drain region to a source region into an insulating film holding charges which is located immediately below a memory gate electrode. By the injection of the hot electrons into the insulating film holding charges, the threshold voltage of the memory gate electrode is increased.
On the other hand, an erase operation is performed using a band-to-band tunneling phenomenon (BTBT erasing). That is, the erase operation is performed by injecting holes generated in the vicinity of an end portion of a memory source region located immediately below the memory gate electrode into the insulating film holding charges. The threshold voltage of the memory gate electrode that has been increased by the injection of the hot electrons is reduced by the injection of the holes.
In a read operation, as the threshold voltage, a middle voltage between the threshold voltage of the memory gate electrode in a write state and the threshold voltage of the memory gate electrode in an erase state is applied to the memory gate electrode to thus determine whether the memory gate electrode is in the write state or the erase state. Documents each disclosing this type of flash memory include Patent Documents 1 and 2.